edited by
19,442 views
62 votes
62 votes
A cache memory unit with capacity of $N$ words and block size of $B$ words is to be designed. If it is designed as a direct mapped cache, the length of the $\textsf{TAG}$ field is $10$ bits. If the cache unit is now designed as a $16$-way set-associative cache, the length of the $\textsf{TAG}$ field is ____________ bits.
edited by

10 Answers

9 votes
9 votes

Since offset not given so we can neglect it because line offset in (direct cache) and set offset in (set - associative cache) is same.

In direct cache = Tag(10) + line (x, assume) + offset (neglect it)

In set associative = Tag(t assume) + Set(x - 4) + offset (neglect it) , since set = $\frac{Number -of- Lines }{16- way -set- associative}$ = 2x-4

Now , In direct cache = 16- way set associative

         Tag(10) + line (x, assume) =  Tag(t assume) + Set(x - 4)

              10 + x = Tag + (x - 4)

               Tag = 10+4 = 14 bits

3 votes
3 votes
When it is directed mapped cache, the physical address can be divided as
(Tag bits + bits for block number + bits for block offset)
With block size being B words no. of bits for block offset = log (B)
Because the cache capacity is N words and each block is B words, number of blocks in cache = N / B
No. of bits for block number = log (N/B)
So, the physical address in direct mapping case
= 10 + log (N/B) + log (B)
= 10 + log (N) – log B + log B
= 10 + log (N)
If the same cache unit is designed as 16-way set associative, then the physical address becomes
(Tag bits + bits for set no. + Bits for block offset)
There are N/B blocks in the cache and in 16-way set associative cache each set contains 16 blocks.
So no. of sets = (N/B) / 16 = N / (16*B)
Then bits for set no = log (N/16*B)
Bits for block offset remain the same in this case also. That is log (B).
So physical address in the set associative case
= tag bits + log (N/16*B) + log B
= tag bits + log (N) – log (16*B) + log B
= tag bits + log (N) – log 16 – log B + log B
= tag bits + log N – 4
The physical address is the same in both the cases.
So, 10 + log N = tag bits + log N – 4
Tag bits = 14
So, no. of tag bits in the case 16-way set associative mapping for the same cache = 14.
–1 votes
–1 votes

One approach will be we can find the number of blocks in main memory with the help of tag bits like given in the following picture

so total number of blocks in main memory is 131072 so we can find number of blocks in the cache as 131072/1024=128 blocks 
now when mapping is set associative so total number of sets in cache is 128/16=8 sets so now total number of blocks in main memory is 131072/8=16384 which is 2^14 so 14 bits are needed in tag.

Answer:

Related questions