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The theoretical dividing line between Reduced Instruction Set computing (RISC) microprocessor and Complex Instructions Set Computing (CISC) microprocessor is

a) Instruction execution rate to be one instruction per clock cycle
b) Number of address and data lines
c) Number of pins in the chip
d) None of the above
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RISC 

  • one cycle execution time: RISC processors have a CPI (clock per instruction) of one cycle. This is due to the optimization of each instruction on the CPU and a technique called pipelining

CISC

       Here CPI is Not equal to 1.

Hence option A should be Correct..

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