1 votes 1 votes A counter is designed with six stages of flip flops. Determine the output frequency at the last (sixth) stage, when input frequency is $1$ $MHz$. $1$ $MHz$ $166$ $KHz$ $15.625$ $KHz$ $0$ Digital Logic digital-logic isro-ece flip-flop + – sh!va asked Mar 1, 2017 • edited Jun 7, 2020 by Sabiha banu sh!va 1.2k views answer comment Share Follow See all 3 Comments See all 3 3 Comments reply sh!va commented Mar 1, 2017 reply Follow Share output frequency = input frequency / Total no. of states in counter Ans = 1 MHz/ 2 6 = 1000000/64 =15625 Hz = 15.625 KHz 0 votes 0 votes Akriti sood commented Mar 1, 2017 reply Follow Share oo yes..sorry..i missed that. thanks 0 votes 0 votes rahul sharma 5 commented Jan 16, 2018 reply Follow Share Answer should depend on way counters are organized, LSB to MSB or other way? 0 votes 0 votes Please log in or register to add a comment.