explain

Question

Comments

i think (a) option

---

whats PO??

---

perform operatin just like EX stage ;)

Answer 1

1

2

3

4

5

6

7

8

9

10

11

12

I1

F

D

OF

PO

WB

I2

F

D

OF

PO

WB

I3

-

-

F

D

OF

PO

WB

I4

F

D

OF

PO

WB

stall in pipeline at clock cycle 3 and 4 due to structural dependency (due to shared Instruction and data caches, OF and IF of two instructions cannot happen in same clock cycle) and in 8 and 9 due to data dependency

so ans is d

Comments

so the hardware is not available for instruction 3 i.e registers r1 and r2 ?

Answer 2

1 RAW hazard present btwn last two instruction --> DATA HAZARD

NO structural dependency & no control dependency ..

so (a) option  correct

---

PLZ check!!

I1	IF	ID	OF	PO	WB
I2		IF	ID	OF	PO	WB
I3			IF	ID	----	OF	PO	WB
I4				IF		ID	OF	PO	WB

Comments

structural hazard is also present

---

explain than plzz and correct me...?

---

look at the line in question -->assume that there are no seperate data and cache , so r1 and r2 are busy in first two instructions ,right ? how can they available for instruction 3 ?

Answer 3

i suppose the questions says there is a single memory for data and instruction. obviously data hazard is there the third instruction will suffer from data hazard because during that clock period R1,R2 has not be written by the first two instruction structural hazard is also there Look at the last instruction it access memory to write the value from R1 but the next instruction can be an instruction which will be fetched from memory so there will be issue regarding hardware resource(memory) control hazard wont be a possible as there or no jump or branch instructions so to conclude this pipeline has got data and structural hazard option D