Test by Bikram | Mock GATE | Test 4 | Question: 51

Question

In a synchronous series counter of Modulus $256$, the propagation delay for each $2$ input AND gate is $5$ ns and for each flip-flop is $25$ ns. The maximum frequency of the Mod-256 counter is _____MHz.

Comments

In synchronous counters, the same clock is applied to all instances of flip flops.

Propagation delay for AND gate (combinational circuit ) = $5$ $ns$

Propagation delay for flip flop $=$ $25 ns$

Our cycle time should be at least big enough so that output from one flip flop and the combinational circuit should radiate to next flip flop input so that for next clock cycle this flip flop will active.

Time(of $1$ cycle) >= Time taken by flip flop + time taken by combinational circuit

                       $T  > = 25 ns +  5 ns$

                      $ T >= 30 ns$

 time period = $1 / frequency$

                      $1/F >= 30 ns$

                         $F<= 33.33 Mhz$

Plz, correct me where I m doing mistake???

@Bikram Sir

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with one single gate you cannot count till 256 .

http://www.allaboutcircuits.com/textbook/digital/chpt-11/synchronous-counters/

Answer 1

maximum frequency for synchronous series counter
= 1/ flip-flop delay + (n-2) AND gate delay  [ n = 8 as 256 = 2^8 ]
= 1/ 25+6*5
=18.18 Mhz

Comments

that is standard series synchronous counter, !

can you make a synchronous counter with 8 FF's which produce mod-256 ? i don't know how to make it !

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@Shaik Masthan yes, we can't make a synchronous binary counter without the help of AND gate for more than 2 flip flops.

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if it is replaced with any combinational circuit, then it is not standard series synchronous counter !

 this statement means--> it is not a series synchronous counter

or it is a series synchronous counter