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Consider the following Program segment for a CPU having three Registers $R1 ,R2 ,R3$.

$\begin{array}{|l|l|l|} \hline \text{Instruction} & \text{Operation} & \text{Instruction} \\ {} & {} & \text{Size In Words} \\ \hline \text{MOV } R1, 500 & R1 \leftarrow [500] & 2 \\ \hline \text{MUL } R3, R1 & R3 \leftarrow R3 ^* R1 & 1 \\ \hline \text{ADD } R2, R1 & R2 \leftarrow R2+R1 & 1 \\ \hline \text{MOV } 500, R3 & m[500] \leftarrow R3 & 2 \\ \hline \text{HALT} & \text{Machine Halts} & 1 \\ \hline \end{array}$         

Consider that the memory is byte addressable with word size $16$ bits and the program has been loaded starting from memory location $500$. If an interrupt occurs while the Add instruction is getting executing by the CPU, then the return address saved onto the stack will be _________
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MOV => 2 words => 2*2= 4 Bytes

MUL => 1 Word =>1*2= 2 bytes

Add= > 1  word =>1*2=2 Bytes

Total 4+2+2=8 bytes

Now 500 to 507 will be occupied by these instructions and then next MOV will start from 508 and when an interrupt occurs during execution of ADD then PC will have 508(next instruction) address.Then after execution CPU will check interrupt and to service interrupt PC contents i.e 508 are pushed to stack.

So answer here should be 508 as per me.
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Memory is byte addressable with word size 16 bits means each instruction size 2 Bytes

so total number of instructions in first 3 instructions are ( 2 + 1 + 1 ) = 4

Each instruction is 2 Bytes long hence total number of Bytes required 4 * 2 = 8 Bytes

Starting  memory location is 500 ,   interrupt occurs while the Add instruction is executing , so after complete the execution of  Add instruction , Memory location is 500 + 8 = 508  ( start at 500 and end at 507 )

Then return address saved into stack , the return address is starting address of the next instruction which is going to be executed is 508 .
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