GATE CSE 2005 | Question: 19

Question

 Which one of the following is true for a CPU having a single interrupt request line and a single interrupt grant line?

• A. Neither vectored interrupt nor multiple interrupting devices are possible

• B. Vectored interrupts are not possible but multiple interrupting devices are  possible

• C. Vectored interrupts and multiple interrupting devices are both possible

• D. Vectored interrupts are possible but multiple interrupting devices are not possible

Comments

whats the correct answer,,? can i leave this... interrupts ?

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Arjun sir please comment on this question. Lots of confusion. I think both are possible with daisy chaining approach. right??

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Answer is Option C.

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I guess people are confused that “there will be no address bus from I/o to transfer addresses”

Answer 1

option c is correct …  for example daisy chainning there is only one interrupt request line and one interrupt grant lline

Answer 2

CPU has single interrupt request and grant line. Here multiple request can be given to CPU but CPU interrupts only for highest priority interrupt so option (A) & (D) are wrong. But here in case of single interrupt lines definitely vectored interrupts are not possible. Hence (B) is correct option.

Comments

correct answer should be (B)

we use daissy chain suct that multiple devices raise an interrupt and their interrupts are services in a chain one by one

but in vectorred interrupt, only high priority device are served and other requests are masked with the use of masking register such that no other low priority device can interrupt the current device operation

Answer 3

Option b.

Comments

Please explain how?

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I also agree with the single interrupt line vectored interrupt are not possible in daisy chain in serial fashion all interrupted devices are arranged In priority order here devices makes an interrupt by making logic level of interrupt low then thereby cpu responds by making ack line enable however in vectored interrupt in which interrupt ing device directs the processor to appropriate interrupt service routine so according to this b should be answer here