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(i) Num of clock cycle if there is hit in tlb and number of clock cycle if there is miss in tlb?

(ii) Num of clock cycle if there is hit in page table and if there is miss in page table (assume here there is no tlb)?

2 Answers

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I dont think it has a definite answer

NUmber of clock cycles for hit and miss depends on the particular system

It is usually mentioned explicitily as miss penalty in the question
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Number of clock cycles depends on that particular system means that depends on processor. In both TLB hit and miss and in case of page table hit and page table miss this number of clock cycle depends upon that processor where it happens.

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