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Consider a three word machine instruction

$\text{ADD} A[R_0], @B$

The first operand (destination) $“A[R_0]”$ uses indexed addressing mode with $R_0$ as the index register. The second operand (source) $“@B”$ uses indirect addressing mode. $A$ and $B$ are memory addresses residing at the second and third words, respectively. The first word of the instruction specifies the opcode, the index register designation and the source and destination addressing modes. During execution of $\text{ADD}$ instruction, the two operands are added and stored in the destination (first operand).

The number of memory cycles needed during the execution cycle of the instruction is:

  1. $3$
  2. $4$
  3. $5$
  4. $6$
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This instruction is 3 word instruction so it  takes 3 MR to fetch the instruction after that 1st operand A[R⁰] takes 1 MR to read value from memory and then 2MR will taken  by the 2nd operand @B. because it is  memory indirect addressing mode  

 

So

 

Total = 3MR + 1MR + 2MR

 

           = 6MR

 

Answer is  option  D
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This can also be a solution. Feel free to correct me.

Answer:

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