wrie through updation in cache

Question

Consider a system with cache access time 20 ns and main memory access time 140 ns. If 60% operations are read operations and hit ratio is 90%. What is the effective access time if write through updation technique is used?
(a) 75.2 ns (b) 76.4 ns
(c) 83.2 ns (d) 84.4 ns

Comments

Sir, in the case of a read miss, if nothing is mentioned about memory hierarchy type, we should assume it to be hierarchical by default irrespective of write through or write back policy used? Or sometimes we should consider hierarchical and sometimes simultaneous?

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@ Pinaki Dash  

yes,  in the case of a read miss, if nothing is mentioned about memory hierarchy type, we should assume it to be hierarchical by default irrespective of write through or write back policy used .

Default  cache access is hierarchical always.

here i make simultaneous word bold to emphasize on cache and MMU both update at same time... don't confuse it with simultaneous memory access !

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Okay. Thank you sir

Answer 1

Given Tc = 20ns, Tm = 140 ns, h = 0.90 

Here write through updation technique is used according to which both main memory and cache memory are updated simultaneously.

Average read access time Tr is 

Tr = h*Tc + (1-h)*(Tc+Tm)

Tr = .90*20 + .10*(20+140) = 34ns.

Average write access time Tw is 

Tw = h*Tm + (1-h)*(Tm) 

Tw = .90*140 + .10*140 = 140ns

Actually whenever a write miss occurs in write through technique the information is written directly into the main memory, there is no need to bring block into the cache.

Given 60% read operations so 40% write operations are there.

Average access time is Tavg 

Tavg = .60 * Tr + .40 * Tw

Tavg = .60 * 34 + .40 * 140 = 76.4 ns

Answer is option b) 76.4 ns 

Comments

Thanks! It clear my concepts.

Answer 2

In Write through updation technique, if the block to be read isn't present in the cache then Memory is accessed and cache and main memory are updated simultaneously. In case of write operation, directly the main memory is accessed for writing the block.

Therefore,

Tavg = 0.9×20 + 0.1×(20+140) [write through cache]

         = 18 + 16

         = 34 ns
Effective access time = 0.6×34 + 0.4×140 [writing only to main memory]

                                      = 20.4 + 56

                                      = 76.4 ns