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A) 2m-1

B) 2m-1

C) 2m+1

D)2m

So, no. of half adders needed= 2*(m-1) +1 =2m-2+1=2m-1

With the help of 2 Half-Adder and 1 OR gate, we can build 1 full adder.
To add two m bits we need (m-1) F.A and 1 H.A
To construct  (m-1) FA we need 2(m-1) = 2m -2 Half adders

So, to add two m bits, we need total 2m-2 +1 = 2m -1 Half adders
(A) is correct option!

Actually in question they said that we have only half adders so as to implement a full adder we need two half adder and one OR gate ,that OR gate should also be implemented using half adder only and to implement one OR gate we need two half adder so overall to implement one full adder we need only 4 half adders.
Therefore,to add two m bit numbers we need total 4*(m-1)+1=4m-3 half adders.
Thus all options are incorrect.

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The sum S of A and B in a half Adder can be implemented by using K NAND gates. The value of K is a) 3 b) 4 c) 5 d) None of these
A half adder can be constructed using two $2$-input logic gates. One of them is an $\text{AND}$-gate, the other is $\text{OR}$ $\text{NAND}$ $\text{NOR}$ $\text{EX-OR}$