GATE CSE 1999 | Question: 2.22

Question

The main difference(s) between a CISC and a RISC processor is/are that a RISC processor typically

• A. has fewer instructions
• B. has fewer addressing modes
• C. has more registers
• D. is easier to implement using hard-wired logic

Comments

no point to point answer yet...

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There are relatively few instructions (often less than 150) and very few addressing modes (often less than 4).

The CPU has a large register file. An alternative to a large register file is an on-chip cache memory. These days manufacturers have put the cache on the processor chip to
accommodate higher speed.

The control unit is hardwired. That is, RISC architectures are not microprogrammed. The code generated by the compiler is directly executed by the hardware; it is not interpreted by microprogramming.

Ref: http://www2.cs.siu.edu/~cs401/Textbook/ch4.pdf see page 4

So according to this all options are correct.

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All the options are properties of RISC

Answer 1

All are properties of the RISC processor.

• http://cs.stanford.edu/people/eroberts/courses/soco/projects/risc/whatis/index.html
• http://cs.stanford.edu/people/eroberts/courses/soco/projects/risc/risccisc/index.html
• http://homepage3.nifty.com/alpha-1/computer/Control_E.html

Comments

@shrestha

RISC needs more software instructions to do the same thing CISC can do in one instruction, that's the meaning of emphasis on software... 

And please read the answers and replies of https://gateoverflow.in/204079/gate2018-5 carefully, you'll see that

* The Hardware that controls RISC is going to be fairly simple cause of the fixed, compact and well-defined instructions.

* The Hardware that controls CISC is going to be really complex, cause it has instruction versions for each useful abstraction, and behaves like a high level system...

so the Hardwired Control of RISC is easier to implement than the Micro programmed control of CISC...

And so it follows that $option \; D$ is obviously correct!!

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@Verma Ashish @srestha  In RISC focus is on software means following –

reference:-http://www2.cs.siu.edu/~cs401/Textbook/ch4.pdf  (refer Page 5 point 4.4)

Because of the simple instructions, the performance of a RISC architecture is related to compiler efficiency. Also, due to the large register set, the register allocation scheme is more complex, thus increasing the complexity of the compiler. Therefore, a main disadvantage of a RISC architecture is the necessity of writing a good compiler. In general, the development time for the software systems for the RISC machine is longer than for the CISC.

But The control unit is hardwired. That is, RISC architectures are not microprogrammed. The code generated by the compiler is directly executed by the hardware; it is not interpreted by microprogramming. (refer page 4)

hence D is true

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Thanks rupesh17

Answer 2

Naswer is B and C

It support fixed length instruction. Not fewer instruction

It has less no addressing modes-- true

It has more register -- true

It is easier to implement using hardwired control logic -- False . Hradwired control logic is implemented inSOP form . Even a slight modification would require the whole circuit to redesign . It is faster but not easier

Comments

@arjun sir : This wrong answer again selected !

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Any reference to show that RISC does not have fewer instructions? Fixed size indirectly reduces the no. of possible instructions.

"It is easier to implement using hardwired logic" - The comparison is with CISC instructions only- that is relative easiness.

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Wikipedia page for RISC states and I quote

"A common misunderstanding of the phrase "reduced instruction set computer" is the mistaken idea that instructions are simply eliminated, resulting in a smaller set of instructions.[20] In fact, over the years, RISC instruction sets have grown in size, and today many of them have a larger set of instructions than many CISC CPUs.[21][22] Some RISC processors such as the PowerPC have instruction sets as large as the CISC IBM System/370, for example"

Answer 3

Option A: RISC only supports Register to register ALU operations, So as compared to CISC it has less Instruction set.(TRUE)

Option B: Because of limitation of using only Registers in ALU operations it has less Addressing Modes.(TRUE)

Option C: Because It has less Instruction Set to make circuits it takes less space, So more space for Registers as compared to CISC. (TRUE)

Option D: Less Instruction Set leads it easy to implement hardwired as compared to CISC.(TRUE)

Answer 4

D is correct. RISC is easier to implement using hardwired logic bcoz of static naturre of design