Definition- Expand opcode technique is required in fixed length instruction supported CPUs. In this process, bits of address field are appended with opcode to generate lower order instructions.
For example- If a cpu support 0-address instructions and 1-address instructions then 0-address instructions are lower order instructions.
So after creating 1-address opcodes, remaining opcodes are appended with address field to create 0-address instructions(because address field not required in 0-address instructions).