If your user program directly deals with Physical memory , then certainly the Security of our system is in danger. This is one of the reason for 'why virtual memory'.When our system uses this technique , the whole physical memory services are abstracted , what we can see is 'Virtual addresses'. We can never know the actual physical address which our program uses.
Now when there are virtual addresses and physical addresses then question arises , who will translate a virtual address to physical address , Here MMU comes in picture.MMU is hardware usually inside CPU (or sometimes separate IC)that converts virtual addresses to physical addresses. Now CPU sends this physical address through buses to Memory controller and this memory controller takes this physical address supplied by CPU and uses it to interact with DRAM.SO that's the story of MMU.
Page tables are basically data structures corresponds to particular process and they contains mappings between virtual addresses and physical addresses.our OS maintains these tables.When CPU generates a logical address , it must br translated and most of the time (say ~99%) this this logical to physical address translation available in TLB which is a Cache (reside on MMU).THe reason behind using TLB is , to get the translation work as fast and possible and if we access memory every time for this translation (in case of Page table , if they are stored in memory) then it's a drastically time consuming.If there is TLB miss then MMU will access the page table through PTBR.
If page table size is small enough(which is generally not) then we can store them in registers.
If there is no virtual memory concept then No MMU,no page table nothing needed because now we are accessing DRAM directly.
