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5 votes
5 votes
State whether the following statements are TRUE or FALSE

In a microprocessor-based system, if a bus (DMA) request and an interrupt request arrive sumultaneously, the microprocessor attends first to the bus request.
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9 votes
9 votes
i think it should be true ....consider a system in which we have modules like FETCH,DECODE,EXECUTE,WRITE-BACK..

now say both DMA request and interrupt arrive during DECODE cycle.....

CPU always look for DMA after every phase(like fetch,decode)but CPU see interrupt only after end of instruction....

reason is that if we allow interrupt in between the phases...interrupt may change current registers and program status word....so its always done that DMA can be allowed in phases(as it dont changes the register content)...but interrupt not....
6 votes
6 votes
The HOLD input has a higher priority than the INTR or NMI interrupt inputs.

So the answer is true.
6 votes
6 votes
It should depend on when both requests come. Since DMA access bus by cycle stealing(or between cycles) and interrupts are checked before fetching a new instruction, DMA has an upper hand here. Also DMA requires only bus and not CPU, whereas an interrupt may require both. So in case an instruction is being executed, DMA will get its bus first. In case: "before fetching a new instruction", anyone's request could get satisfied first. Plus, this case might also depend on implementation of the microprocessor.
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