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In a $2$ level control unit design there exists $1K$ word micro control memory and a $32$ word nano control memory. If it is desired to provide $24$ control signals, what is the $\%the $ of reduction in control memory if we design control memory using nano programming with respect to the $1$ level control memory design?

Explain what is nano programming$?$
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Size of microCM = 1024* (10+5) = 15360 bits
Size of nanoCM = 32*24 = 768 bits
Total size = 16128 bits
1 - level design
Size = 1024 * (24+10) =  34816 bits 
So reduction = 34816 - 16128 / 34816 % = 53 %

                                                                                                                  --from virtual gate

Can someone explain this answer??

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nano memory is a two level storage system in microprogramme control sysem.

in operations with a parallelism of First level – Vertical formate micro programme

Second level – Horizontal formate micro programme 

suppose there are 2048 micro instruction of 200 bits each

case-1 ) IN 1 – level control storage, size= 2048 x 200 bits

case-2 } in 2 level control storage (assume there are 256 distinct instruction)

nano storage size = 256 x 200 bits (it is stored in horizontal formate on 2nd level)

control storage size = 2048 x 8 bits (8 bits to represent 256 instruction in nano memory in vertical formate)

apply same concept in this question to practice

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