Gate 1991
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Find the maximum clock frequency at which the counter in the figure below can be operated. Assume that the propagation delay through each flip flop and each AND gate is 1...

A_i_$_h

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A_i_$_h asked Nov 29, 2017

1 votes

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ravi rajak 3 asked Oct 13, 2017

181 views

Gate 1991 (Number system)

ravi rajak 3

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ravi rajak 3 asked Oct 13, 2017

1 votes

0 answers

Venkat Sai asked Oct 7, 2017

465 views

GATE 1991 SELF DOUBT
https://gateoverflow.in/26442/gate1991_5-c i think the answer given by arjun sir is wrong because the time period of the clock should be selected in such a way that the present output is generated by the flipflop and it goes to the combinational ... output of the last flipflop doesnt effect any inpputs to any other flipflops and hence the delay of that flipflop can be neglected

https://gateoverflow.in/26442/gate1991_5-c i think the answer given by arjun sir is wrong because the time period of the clock should be selected in such a way that the p...

Venkat Sai

465 views

Venkat Sai asked Oct 7, 2017

Digital Logic
digital-logic
flip-flop

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5 votes

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ibia asked Nov 14, 2015

783 views

GATE CSE 1991 | Question: 6,b
Design a $1024$ bit serial-in/serial-out unidirectional shift register using a $1K\times 1 $bit RAM with a data input $D_{in}$, data output $D_{out}$ and control input $\text{READ}/\overline{\text{WRITE}}$. You may assume the availability of standard SSI and MSI components such as gates, registers and counters.

Design a $1024$ bit serial-in/serial-out unidirectional shift register using a $1K\times 1 $bit RAM with a data input $D_{in}$, data output $D_{out}$ and control input $...

ibia

783 views

ibia asked Nov 14, 2015

Digital Logic
gate1991
digital-logic
sequential-circuit
shift-registers
out-of-gate-syllabus

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score	score:10
answers	answers:2
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