2 votes 2 votes The direct mapped cache uses M main memory blocks and N cache blocks, for a given Physical Address it resulted T tag bits and placed in P cache block. Which main memory words May respond to this Physical Address? Block size is P words. CO and Architecture cache-memory direct-mapping co-and-architecture + – AnilGoudar asked Oct 18, 2017 • retagged Nov 13, 2017 by Arjun AnilGoudar 461 views answer comment Share Follow See 1 comment See all 1 1 comment reply sachin! commented Oct 19, 2017 reply Follow Share here you have not given detail about which word you want to access from selected block in cache your physical address is incomplete if no of word in block>1 tag bit index block offset your tag bit is t index bit =binary representation of log(p) you have not given any detail about block offset which is required if no of word in a block=1 then block offset not required but in other case it required 1 votes 1 votes Please log in or register to add a comment.