Whether followingis SLR(1) or Not ?
E->E+T/T
T->TF/F
F->F*/a/b
Doubt : While making state you will get one state as I1(E'->E. & E->E.+T ) , is this shift reduce or not ?
if not then while making parsing table for LR(0) what will you put in I1 state .... ( All Shift/Reduce Entry as Accept or not) ?