Co doubt

Question

First field of 3 field instruction register indicate opcode second addresses are register from a set of 100 registers and third is the memory address field.

32 bit instruction is placed in 1MW memory.

If there are K instruction which uses both register and memory reference and L address register reference instructions then the number of zero address instruction possible are

a)[(2^5-K)*2^20-L]×2^7

b)[(2^5-K)*2^7-L]×2^20

c)[(2^5-L)*2^20-K]×2^7

d)[(2^5-L)*2^20-K]×2^20

Comments

a)[(2^5-K)*2^20-L]×2^7 I am getting this as answer?

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Sir.. What is MW memory exactly.

Answer 1

Here the thing worth watching is that in 2 address instructions , we have two types of address : register address for register set and memory address for memory word . And it is given that in 2 address instruction format , we will have opcode , then register address field then finally memory address field. So in generation of 1 address instruction using expanded opcode technique we will have memory based instruction as register address field will be merged with the unused opcodes of 2 address instruction. So the phrase "L register reference instruction" should be "L memory reference instruction" instead . Having said that :  

Given register size      =      100 registers

Hence number of bits needed to address these registers   =    ceil(log₂ (number of registers))

                                                                                    =    ceil(log₂ 100)

                                                                                    =    7

         number of bits needed to address memory              =    ceil(log₂(Memory capacity))

                                                                                    =    ceil(log₂(2²⁰))

                                                                                    =    20

Hence in a 2 address instructions , number of bits remaining for opcode   =   32 - 7 - 20    =    5 bits

Hence number of instructions = number of opcodes          =    2⁵             =   32 instructions

But given number of 2 address instructions                      =    K

Hence number of unused opcodes                                   =    2⁵ - K  

So this opcodes along with next 7 bits of register address will be used to generate one address instructions using expanded opcode technique.

Hence number of one address instructions possible          =   ( 2⁵ - K )  * 2⁷  [ As there are 2⁷ combinations possible as we have taken 7 bits of register address field of 2 address instruction for each of its unused opcode ]

Now given number of 1 address instructions                     =   L

Hence number of unused opcodes for 0 address instruction     =   [ ( 2⁵ - K )  * 2⁷   -  L ]

Now each of these opcodes will be merged with each of the 2²⁰ combinations as we have 20 bits in memory address field to form 0 address instructions .

Hence number of 0 address instructions                                =   [ ( 2⁵ - K )  * 2⁷   -  L ] * 2²⁰

Hence B) should be the correct option .

Comments

@ Habibkhan Indeed Standard notation is opcode register memory but if nothing is mentioned then we should take according to reference right? 

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But here the "order is clearly mentioned" but wht is being asked is not according to the order which is given . In COA questions , mostly we need not take any default assumptions especially in these questions.

The instruction format will be defined clearly in the question ., dont worry @saxena0612 ..:)

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@  Habibkhan Sir, is the following method appropriate for such questions

Size of no. of 2 address instructions = k * $2^{7}$  *  $2^{20}$   

Size of no. of 1 address instructions = L *  $2^{20}$

no. of 0 address instructions =  $2^{32}$  -  k * $2^{7}$  *  $2^{20}$   -     L *  $2^{20}$