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Suppose there are 500 memory references in which 50 misses in the 1st level cache and 20 misses in the 2nd level cache . Let the miss penalty from L2 cache to memory is 100 cycles .

Hit time in L2 cache is 20 cycles and hit time in L1 cache is 10 cycles . If there are 2.5 memory reference/instruction , average number of stall cycles per instruction will be __________

What's wrong in my approach?

I am not using any direct formula

# of instructions = 500/2.5 = 200 

Total cycle time = (500-50) * 10+ (50-20) * 20 + 20 * 100 = 7100 cycles

For 1 instruction = 7100/200 = 35.5 

If there is no miss i.e all hits in L1 cache then Total time = 200 * 10 = 2000 cyles

For 1 instruction = 2000/200 = 10

Avg No of stalls/inst = 35.5 - 10= 25.5

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You're finding the number of stall cycles for memory references, and dividing by the number of instructions. I didn't get your logic.

If you don't want to remember any formula, then you can use the following technique:

Total number of stall cycles = 50*20 + 20*100 = 1000 +2000 = 3000 total stall cycles

number of instructions = 500/2.5 = 200

number of stall cycles/instruction = 3000/200 = 15 stalls/ins

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