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GATE -2009 

A CPU generally handles an interrupt by executing an interrupt service routine

  1. As soon as an interrupt is raised.

  2. By checking the interrupt register at the end of fetch cycle.

  3. By checking the interrupt register after finishing the execution of the current instruction.

  4. By checking the interrupt register at fixed time intervals

I am having confusion between option A and C...

For hardware interrupt option A is suitable and for software interrupt option C

asked in CO and Architecture by (307 points)
edited by | 366 views
+1
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i think bro it says ...it preempt process execution....it doesn't say that instruction is left as it is and  we served the INTERRUPT...
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can't find a suitable answer ...bro
+1
i think....in order to execute the instruction we store our temporary results in registers....now i am executing 1st inst....say interrupt occures....here i will let complete instruction....store the conctent of register in memory...and then will allow the ISR to take control...
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still i think we should wait for someone to give most approprite answer....
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yep..indeed

2 Answers

+1 vote
answer should be 3 that is CPU always check the interrupt after the execution of current instruction...not in between phases...

REASON=

       if we allow CPU to handle interrupt in between phases like fetch ,decode....THE INTERRUPT SERVICE ROUTINE may changes the values of registers ......so its very costly......as we are loosing register contents...

hence CPU look out for interrupt after execution of current one....

one more point .....we can allow DMA in between any phase because DMA will simply grab bus .....it will not change content of registers..
answered by Boss (10.7k points)
0
my doubt is different

As we know H/W interrupt is serviced as soon as the interrupt occurs

bt S/W interrupt waits a while for the CPU to complete its current execution  and then processes the interrupt
0 votes
Assume that an interrupt request arrives during execution of instruction i. The processor first completes execution of instruction i. Then, it loads the program counter with the address of the first instruction of the interrupt-service routine. After execution of the interrupt-service routine, the processor returns to instruction i + 1. Therefore, when an interrupt occurs, the current contents of the PC, which point to instruction i + 1, must be put in temporary storage in a known location. A Return-from-interrupt instruction at the end of the interrupt-service routine reloads the PC from that temporary storage location, causing execution to resume at instruction i + 1.
answered by Boss (34.6k points)

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