36 votes 36 votes Which of the following is true? Unless enabled, a CPU will not be able to process interrupts. Loop instructions cannot be interrupted till they complete. A processor checks for interrupts before executing a new instruction. Only level triggered interrupts are possible on microprocessors. CO and Architecture gate1998 co-and-architecture interrupts normal + – Kathleen asked Sep 25, 2014 retagged Nov 13, 2017 by Arjun Kathleen 11.7k views answer comment Share Follow See all 3 Comments See all 3 3 Comments reply Manu Thakur commented Jan 9, 2018 reply Follow Share The (C) is false as shown in the below screenshot: Interrupt check happens before the CPU fetches new instruction. 11 votes 11 votes Divy Kala commented Apr 7, 2019 reply Follow Share What about piplelined processors? The fetching cannot wait. 1 votes 1 votes Pranavpurkar commented Dec 3, 2022 reply Follow Share Divy Kala there also it should check. 0 votes 0 votes Please log in or register to add a comment.
Best answer 48 votes 48 votes Answer is (A). Options (B) and (D) are obviously false. A processor checks for the interrupt before FETCHING an instruction, so option (C) is also false. Hardi Shah answered Dec 25, 2015 edited Sep 15, 2018 by kenzou Hardi Shah comment Share Follow See all 7 Comments See all 7 7 Comments reply Show 4 previous comments KartikGawande commented Nov 12, 2022 reply Follow Share This might seem funny but i took the ‘enabling’ in option A to be of the CPU itself and not the interrupts. Can the option A mean this? 0 votes 0 votes Souvik33 commented Nov 16, 2022 reply Follow Share Fetching comes before execution → checks for interrupts “before execution” → checks for interrupts before “decoding” ..so on So in a MSQ sence opt (C) is also right 0 votes 0 votes abir_banerjee commented Nov 27, 2022 reply Follow Share @KartikGawande obviously yess bro , because if the CPU is disabled then how will the interuppt even be processed. 0 votes 0 votes Please log in or register to add a comment.
2 votes 2 votes are both option (a) and (c) TRUE .... explain ??? Option (c) “Polling is like picking up your phone every few seconds to see if you have a call. Interrupts are like waiting for the phone to ring.” CPU senses (checks) interrupt request line after every instruction; if raised,.... correct me http://www.cs.toronto.edu/~demke/469F.06/Lectures/Lecture6.pdf or archive Mithlesh Upadhyay answered Apr 8, 2015 edited May 6, 2021 by Shiva Sagar Rao Mithlesh Upadhyay comment Share Follow See all 12 Comments See all 12 12 Comments reply Arjun commented Apr 8, 2015 reply Follow Share Suppose one wants to know who is the Prime Minister of Australia. If he asks this to someone we say "he enquired about Australian Prime Minister". Now, if someone tells him this info without asking, still he needs to open his ear and listen to it. But we never say "he enquired" here. In similar way, (c) is wrong :) In very concrete sense it is correct. But we have to be at the right level of abstraction- when someone asks what happens inside CPU we shouldn't say 0's and 1's interchange each other ;) 19 votes 19 votes Mithlesh Upadhyay commented Apr 8, 2015 i reshown by papesh Sep 11, 2016 reply Follow Share :) yes , funtastic he can't find way, , but thank you :) , instruction cycle with interrupt is the last stage of instruction cycle , so it should perform instruction execution ..steps 1) instruction fetch 2) instruction execution then 3) interrupt checking if interrupt is present there then interrupt service else aglo is repeat 1 then 2 ..... so on 5 votes 5 votes Arjun commented Apr 8, 2015 reply Follow Share I wouldn't call the 3 a step. Interrupt line is checked at that time, but it is not having any overhead. 0 votes 0 votes Anurag_s commented Nov 28, 2015 reply Follow Share ans is only A here then? 1 votes 1 votes Arjun commented Nov 29, 2015 reply Follow Share yes.. 2 votes 2 votes Aspi R Osa commented Dec 25, 2015 reply Follow Share Arjun sir, how? enabling is for software and user generated interrupts only right? for hardware interrupts e.g. system failures also do we need the enabling? 0 votes 0 votes junk_mayavi commented Jan 17, 2017 reply Follow Share I think they meant only maskable interrupts. Thermal interrupt will be always enabled, right? 0 votes 0 votes GateAspirant999 commented Jun 10, 2017 reply Follow Share please comment about loop instruction point, I understand that if loop instructions cannot be interrupted then infinite loops may result. But is this correct reasoning for this option to be false? Can you please give me some more details? Or should I go and read some good book on microprocessors too. I read Douglas Hall for 8086 in my college days, just want to avoid that now. How exactly loop instructions are processed? 2 votes 2 votes Swami patil commented Nov 26, 2017 reply Follow Share Sir I. Am not getting why option c is wrong 0 votes 0 votes akash.dinkar12 commented Jul 6, 2018 reply Follow Share @Swami Patil Option C is wrong because we know that instruction has to pass through various phases(fetching, decoding, executing, writeback ), after completion of instruction CPU has to check for interrupts. CPU can not check interrupts after executing phase.. 1 votes 1 votes gauravkc commented Sep 30, 2018 reply Follow Share Why are we assuming it to be a pipelined system? 0 votes 0 votes Alakhator commented Oct 22, 2019 reply Follow Share Anybody with this toronto pdf? It's saying forbidden 1 votes 1 votes Please log in or register to add a comment.