Register

Digital Logic - Output waveforms for a negative edge triggered J-K flip-flop.

1,051 views

Please log in or register to answer this question.

Voting & Accepting an answer helps improve the community
← PreviousNext →
← Previous in categoryNext in category →

Related questions

0 votes
0 votes
0 answers
1
Garrett McClure asked Oct 31, 2017
401 views
Given J-K flip-flop in 0 state, what is the sequence of inputs necessary to cause the following sequence of states
Given a J-K flip-flop in the 0 state what is the sequence of states for the following sequence of inputs:00, 01, 10, 11, 11, 00, 00, 11, 01, 10.
User Avatar
0 votes
0 votes
0 answers
4
POOJAN SHAH asked Aug 24, 2017
638 views
Digital-Logic Flip-flop Counters
Qn) Ripple counter with preset works as? QN- 2) Construction of Decoder 4:16? QN- 3) 4 JK Flip-flops with high input. The frequency at output?
Qn) Ripple counter with preset works as?QN- 2) Construction of Decoder 4:16?QN- 3) 4 JK Flip-flops with high input. The frequency at output?
User Avatar
Link Copied!