1 votes 1 votes Require detailed explanation along with formulas and which formula to use depending upon each scenario CO and Architecture pipelining + – Namit Dhupar asked Nov 16, 2017 Namit Dhupar 4.1k views answer comment Share Follow See all 4 Comments See all 4 4 Comments reply A_i_$_h commented Nov 17, 2017 reply Follow Share CPI = cycles per instruction CPI for ideal pipeline = 1.1 rest u have to calculate based on question....it varies By solving many questions ul get an idea...or post any specific questions where different formulas have been used...may be then u could be helped to know the difference This is vague :) 0 votes 0 votes Namit Dhupar commented Nov 17, 2017 reply Follow Share Correct me if I am wrong, but until now whatever i have analyzed is that CPI has 2 variants Let's take for Ex 5 stage instruction IF = 2ns ID = 1.5ns OF = 2ns EX = 3ns WB = 1ns while there are buffers/latches/registers having time latencies of let's say 1ns. 1.) CPI for non pipelined processors = which is basically summation of all the time latency faced during each instruction while ignoring delays due to other buffers/latches/registers, CPI = 2+1.5+2+3+1 = 9.5 2.) CPI for pipelined shall be the maximum time latency relative to all the stages in the pipeline ie = EX + latency due to interstage latches (3+1 = 4 ) Any Modification/Editing that can enhance this question is more than welcome :) 0 votes 0 votes Surajit commented Nov 17, 2017 reply Follow Share CPI is cycles per instruction,ie CPU clock cycles needed to execute an instruction,there us no unit associated with it...when you use something like '1.5ns' that is the total cycle time or execution time etc. 0 votes 0 votes A_i_$_h commented Nov 18, 2017 reply Follow Share @namit right :) 0 votes 0 votes Please log in or register to add a comment.