I think $, D, JK or SR-Flip Flop$ any one of them could be used.

What is your opinion Praveen Saini ji ?

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+14 votes

Design a synchronous counter to go through the following states:

$$1, 4, 2, 3, 1, 4, 2, 3, 1, 4 \dots $$

$$1, 4, 2, 3, 1, 4, 2, 3, 1, 4 \dots $$

0

What is your opinion Praveen Saini ji ?

+16 votes

Best answer

Sequence given is as

$ 1,4,2,3,1\ldots$

From the given sequence of states we can design the state table and Suppose we are using T-FF for sequential circuit of counter.

Present state | Next State | FF Inputs | ||||||
---|---|---|---|---|---|---|---|---|

$A$ | $B$ | $C$ | $A^+$ | $B^+$ | $C^+$ | $T_A$ | $T_B$ | $T_C$ |

$0$ | $0$ | $0$ | $x$ | $x$ | $x$ | $x$ | $x$ | $x$ |

$0$ | $0$ | $1$ | $1$ | $0$ | $0$ | $1$ | $0$ | $1$ |

$0$ | $1$ | $0$ | $0$ | $1$ | $1$ | $0$ | $0$ | $1$ |

$0$ | $1$ | $1$ | $0$ | $0$ | $1$ | $0$ | $1$ | $0$ |

$1$ | $0$ | $0$ | $0$ | $1$ | $0$ | $1$ | $1$ | $0$ |

$1$ | $0$ | $1$ | $x$ | $x$ | $x$ | $x$ | $x$ | $x$ |

$1$ | $1$ | $0$ | $x$ | $x$ | $x$ | $x$ | $x$ | $x$ |

$1$ | $1$ | $1$ | $x$ | $x$ | $x$ | $x$ | $x$ | $x$ |

From the above table , we will find the equation of $T_A$, $T_B$ and $T_C$

0

Is it necessary to cover all the possibilities? I mean we can only make the k-map for 1->4->2->3 and then i can find the Input expression for all three flipflops.

0

If we use ripple or jhonson counter we can make it, right? Since for k FF we can have 2^{k} or 2k states respectively.

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here sequence is given then why are you not following the given sequence only like (1 4 2 3 1 4 2.......).

means why are you covering all like(1 2 3 4 5 6 7 ).

means why are you covering all like(1 2 3 4 5 6 7 ).

+1

@rajoramanoj, from state sequence we get state 4 where we need 3 bits to represent,100, with 3 bits we have 8 combinations 0 to 7, those state are not in sequence are unused states, for those next state is shown as dont cares.

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Hi @Praveen Saini ji,

Thanks for your valuable effort. But to make circuit more error tolerant instead of using DO NOT CARE. We should move to some valid state from Invalid state.

0

@Chhotu @Praveen Saini

Can we implement any sequence of 4 distinct states

With 2 FFs

like 0,7,1,9,0,7,1,9.. ?

0

https://gateoverflow.in/2117/gate2011-15 check this question.

We can have log n FF for n states. We just have to design the combinational circuit which will provide the appropriate input during next clock cycle to count those many states.

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