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"The Address Part of the Index Addressing mode Instruction must  set to zero,to behave like Register Indirect Mode Instruction"
IS IT A VALID STATEMENT ?

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Yes, it is a valid statement, if Indexed address holds 0 in place of the base address and then this 0 is added with index register value then it acts similarly as if we are having register address in the instruction.

EA in Indexed Mode = M[base address from Instruction + Index register displacement] => M[0 + index register] => M[index register] (here base address is in instruction and Index register keeps displacement value which keep chnaging)

(Now here the displacement if got added to a base != 0(but some memory address) then it gives a address, also displacement if got added to base =0 is again address ) 

EA in Register Indirect = M[value in register] (Here register address is in Instruction)

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Yes, the given statement is VALID.

In Register Indirect Mode, the instruction specifies a register in the CPU whose contents give the address of the operand in memory. In other words, the selected register contains the address of the operand rather than the operand itself. So,

Effective Address = Register Value.

In Indexed Addressing Mode, the content of an index register is added to the address part of the instruction to obtain the effective address.

Simply, 

Effective Address = Index Register Value + Address in the Instruction

Now if, an index type instruction does not include an address field in its format means, we can assume Address in the instruction = 0 , So, 

Effective Address = Index Register Value + 0 = Index Register Value

So now, it is behaving as Register Indirect Addressing mode.

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