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Conditional bit(Flag) Micro-opn. Next Address

                                            Micro-Instruction Format

If a micro program supports 46μ operations with a parallelism of 2,how many and what size of field exists in micro operation field?

Given size of micro-opn field is 9bits.

Answer: Total 9 bis divided in 4 and 5 bit.

Can anyone explain how this division is being done.

in CO and Architecture by Active (1.2k points) | 530 views

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We cannot use horizontal micro programming here as its degree of parallelism is one or more than one i.e. it cannot guarantee 2 control signals to be active at a time.

But we can use vertical micro programming with two groups. Given that micro-operation field size is 9 bits, division can be done in one among the following ways :

(1,8), (2,7), (3,6), (4,5)

Also it is known that 46 micro operations are supported, so we need to select the most efficient group considering very small wastage of space

With (1,8), number of control signals possible = $2^{1} + 2^{8} = 2 + 256 = 258$ (which is very large than 46)

Similarly with (2,7) we have = $2^{2} + 2^{7} = 4 + 128 = 132$ $> 46$

With (3,6) we have = $2^{3} + 2^{6} = 8 + 64 = 72$ control signals

And with (4,5) we have = $2^{4} + 2^{5} = 16 + 32 = 48$ control signals which is very close to 46.

So we need two vertical micro programming fields with 4 and 5 bits each to support 46 micro operations efficiently.

However the question would have been more apt if it was "with a parallelism of atmost 2" as vertical micro programming works on the principle of none or one

by Boss (12.1k points)
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Thanks, great explanation.
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in first line in place of word  horizontal it should be vertical

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