When to assume Structural hazards exists if not mentioned in instruction pipeline-self doubt

Question

When shall we assume structural hazard?Like if nothing is mentioned if data and instruction are fetched via single port,can we assume 'MA' (memory access stage) and 'IF' (instruction fetch) stage can be operated in parallel?Please let me know with ref to this question for example.IF and MA are done in parallel,is it always the case if nothing is told?

https://gateoverflow.in/102565/operand-forwarding-in-pipeline

Answer 1

structural hazard will occures when there is restriction/unavalibility of resources.....

so structural hazard are in single port memory ...because we can't perform operand fetch and  Write back (SUCH MEMORY RELATED OPERATIONS)in parallel.in short

ALL THOSE PARALLEL TASK WITH RESPECT TO MEMORY CAN'T BE DONE...

so in question if they said that single port memory is there then there will be STRUCTURAL HAZARD...

if not then we can say that there is proper arrengement done to fetch multiple memory operations at same time...

Comments

ok.. thanks...I was looking for what assumption to make when nothing metioned.