search
Log In
46 votes
11.7k views

Consider a Boolean function $ f(w,x,y,z)$. Suppose that exactly one of its inputs is allowed to change at a time. If the function happens to be true for two input vectors $ i_{1}=\left \langle w_{1}, x_{1}, y_{1},z_{1}\right \rangle $ and $ i_{2}=\left \langle w_{2}, x_{2}, y_{2},z_{2}\right \rangle $ , we would like the function to remain true as the input changes from $ i_{1}$ to $ i_{2}$ ($ i_{1}$ and $ i_{2}$ differ in exactly one bit position) without becoming false momentarily. Let $ f(w,x,y,z)=\sum (5,7,11,12,13,15)$ . Which of the following cube covers of $f$ will ensure that the required property is satisfied? 

  1. $ \overline{w}xz,wx\overline{y},x\overline{y}z,xyz,wyz$
  2. $ wxy, \overline{w}xz,wyz$
  3. $ wx\overline{y} \overline{z}, xz, w\overline{x}yz$
  4. $ wx\overline{y}, wyz, wxz, \overline{w}xz, x\overline{y}z, xyz$
in Digital Logic 11.7k views
5
Could someone explain me the question plz.. ?
What to do with inputs i1 and i2 ?
How should I group ? In kmap every adjacent coloum differ by one bit , so should I group only adjacent coloums ?
Im not able to understand this question.
6

Static Hazard - A static hazard is the situation where, when one input variable changes, the output changes momentarily before stabilizing to the correct value.

  • Static-1 Hazard: the output is currently 1 and after the inputs change, the output momentarily changes to 0,1 before settling on 1.
  • Static-0 Hazard: the output is currently 0 and after the inputs change, the output momentarily changes to 1,0 before settling on 0.

Dynamic Hazard - A dynamic hazard is the possibility of an output changing more than once as a result of a single input change

How to eliminate static hazard ?

Ans . refer(2) video. 

As a rule, dynamic hazards are more complex to resolve, but note that if all static hazards have been eliminated from a circuit, then dynamic hazards cannot occur.

Notice -> Sometimes we can not fix static Hazards. And sometimes they may not impact circuit functionality. 


I think $f(w,x,y,z) = xz+wxy' +wyz$ is also free from all kind hazards.


Refer ->

  1. https://www[dot]youtube.com/watch?v=s8qF3p7bjlI
  2. https://www[dot]youtube.com/watch?v=fUTCtn_b4qs
  3. https://www[dot]youtube.com/watch?v=6NaMSJq4SVA
  4. https://en.wikipedia.org/wiki/Hazard_(logic)

Please notify if anything is not proper.

ping @rahul sharma 5, @habedo007, @Orochimaru @sushmita @hem chandra joshi @gari and @Paras Nath

12

Before going through best answer , read this link

https://www.geeksforgeeks.org/digital-logic-static-hazards/

0

This Geeksforgeeks link gives the most concise explanation. For those wondering, this topic is also present in the book by Morris Mano 3rd edition (it seems to have been removed from the 5th edition), under the chapter Async Sequential Circuits - Hazards in Combinational Circuits.

3 Answers

53 votes
 
Best answer

The question is indirectly asking for static-1 hazard in the circuit - that is output becoming $0$ momentarily when it is supposed to be $1.$

Here $f(w,x,y,z) = \sum (5,7,11,12,13,15)$

So, $K$-map will be 

So, its minimized sum of products expression will be $xz + wxy' + wyz$. Since all the minterms are overlapping, there is no chance of static hazard here.

Now, lets consider the options one by one:

A. $\overline{w}xz,wx\overline{y},x\overline{y}z,xyz,wyz$

Chance of static hazard.

Here, when $y$ changes from $0$ to $1$, the gate for $wyz$ should give $1$ (from earlier $0,$ assuming $w=z=1$) and that of $xy'z$ should give $0$ (from earlier $1$). But there is a possibility of circuit giving $0$ (static $1$ hazard) momentarily due to gate delays ($xy'z$ coming first and $wyz$ coming later). In order to avoid this, we must add a gate with $wxz$ also which ensure that   all adjacent blocks in $K$-map are overlapped or a single variable change cannot momentarily change the circuit output.

B. $wxy, \overline{w}xz,wyz$

This is not correct as $wxy$ is not a minterm for the given function

C. $wx\overline{y} \overline{z}, xz, w\overline{x}yz$

Here, also static-1 hazard is possible as the middle $4$ pairs are separated by $1$ bit difference to both $wxy'z'$ as well as $wx'yz$. Could have been avoided by using $wxy'$ instead of $wxy'z'$ and $wyz$ instead of $wx'yz$ which will ensure that all neighboring blocks are overlapped.

D. $wx\overline{y}, wyz, wxz, \overline{w}xz, x\overline{y}z, xyz$

These minterms cover all the minterms of $f$ and also, all the neighboring 1's are overlapped by minterms. So, no chance of hazard here and hence is the required answer.

Correct Answer: $D$


edited by
2

IMHO, the question means that when there is a 1-bit change from 0 to 1 or vice-versa, the state of circuit/bit is indeterminate because it has left one of the stage and not reached the other for that fraction-of-second/moment. When the circuit does not understand whether it is 1 or 0, it declares it as false.

0
@Gaurav So, how to make use of that fact?
1

Not sure about it but may be it is referring to boolean hazard as in this question.

3
Yes , You are right @Gaurav
0
@pC clear now?
–1

@Sonam,Is D the right answer?You mentioned that there is no one bit difference?Can you please tell what is the correct answer?And I have seen at some places the first term in D option is not there,and with remaining 5 terms there is no static hazard as all adjacent blocks are overlapped.

 

What do you mean by comment

"and in option d ) which have 5 correct term but one is not matched ... in fact that is not 1 bit difference ...."

Please help

1

@Rahul, the answer was later edited by me and hence the comments don't make sense now. Everything is explained now in answer- there is no use in saying what is the "correct answer" unless you yourself get to know the reason. (GATE is not ISRO exam where they copy the same question and options again).

The question paper was taken from here:

https://drive.google.com/file/d/0B8_aYGBndW4HbHBnM05WTXZjaDg/view

5
0
thankyou. finally understood. :)
4
Shouldn't the minimized SOP be $xz+wx\overline{y}+wyz$?
1
@arjun sir, please edit the answer again with minimized SOP as xz + wxy' + wyz. Also comments for option A are copied again with label as B which is not required.
1
Done (y)
0
arjun sir now it is clear ,nice edit sir
0
what is the significance of two inputs in this question . I did not understand . Can any one please explain me .
34 votes

Given that,  function to remain true as input changes from i1 to i2 and i1, i2 differ in exactly one bit position.

We know that adjacent cells in kmap differ by exactly 1 bit. So, we have to group cells in function represented by kmap such that all adjacent cells are grouped as below.

all these 6 groups gives : 

1
0
But, if the option had been xz+wxy′+wyz, then it also would have been correct, right?
0
17 votes

I found a better way to answer this question .

Go according to the Question .  i1 and i2 differs in exactly one bit position without becoming false momentarily.

Go to option (a)

Draw K map and find  the binary covered by implicant

w'xz =5,7    0101 , 0111    here you will see it is one bit different

wxy'=12,13   1100,1101   here you will see it is also one bit different

xy'z=5,13  0101,1101  here you will see it is one bit different

xyz=7,15 0111, 1111 here you will see it is one bit different

wyz=11,15  1011,1111 here you will see it is one bit different

Option (a) misses wxz possible one bit  change.So it is false.

(b)

wxy = 15,14 but 14 is not covered by K map so b is wrong option

(c)

wxy'z' = 12 =1100  here there is not bit change so it is wrong option

(d)

wyz=11,15  1011,1111 here you will see it is one bit different

wxz=13,15  1101,1111 here you will see it is one bit different

w'xz =5,7    0101 , 0111    here you will see it is one bit different

xy'z=5,13  0101,1101  here you will see it is one bit different

xyz=7,15 0111, 1111 here you will see it is one bit different

wxy'=12,13   1100,1101   here you will see it is also one bit different

So option d satisfy whole f so it is Answer .


edited by
1
Nice explanation :)
Answer:

Related questions

30 votes
3 answers
1
5.4k views
When multiplicand $Y$ is multiplied by multiplier $X = x_{n - 1}x_{n-2} \dots x_0$ ... $5$ and $8$ are $2Y$ and $Y$ $-2Y$ and $2Y$ $-2Y$ and $0$ $0$ and $Y$
asked Oct 31, 2014 in Digital Logic Ishrat Jahan 5.4k views
1 vote
1 answer
2
370 views
In the circuit shown in figure, value of input P goes from 0 to 1 and that of Q goes from 1 to 0. Which output forms shown in figure represents the output under a static hazard condition?
asked Nov 8, 2018 in Digital Logic Gupta731 370 views
3 votes
2 answers
3
794 views
Hi to all, Very challenging question is as follows: For Function F of the following which option is TRUE? I) if B=C=D=1, for any change in value A there can be static hazard 1. II) if B=C=D=1, for any change in value A there ... .com/questions/222382/static-hazard-in-specific-value-or-any-changes our challenge is that anyone please say why these answer disagree with this answer? thanks
asked Jul 1, 2016 in Digital Logic Rank1 794 views
6 votes
1 answer
4
2.9k views
Which of the following expression remove hazard from : $xy+zx'$? A. $xy+zx'$ B. $xy+zx'+wyz$ C. $xy+zx'+yz$ D. $xy+zx'+wz$
asked Jan 24, 2016 in Digital Logic Pradip Nichite 2.9k views
...