This question is based on the concept of **MEMORY INTERLEAVING... **which says that instead of accessing data from memory every time, it is better to divide memory in modules or banks and distribute consecutive data on each module to access the data in parallel..to improve data transfer rate. For this purpose the additional decoder is used to access each module in parallel, so we have to count the latency of decoder also along with each module latency.

**now i am going to explain the solution:---->**

according to the original question there are k banks and k=24 and each bank has c bytes where c=2 . So total we got 2*24=48 bytes in one iteration.

**now we have to calculate one iteration latency:**

decoding time for one iteration is k/2 ns: 24/2=12 ns

and each bank latency is 80 ns

normally when decoder latency is given then total iteration time is calculated as;** K*(decoder latency) + bank latency**

but here we have given the total decoding latency of iteration=12 ns

therefore for one iteration we require : 12+80= 92 ns

Now as we discussed above in one iteration we can get **48 bytes** of data but question ask for** cache block(64 bytes) transfer **therefore we require 2 iterations....... that is** 2*92=184 ns**