3 votes 3 votes How many memory accesses required by the following instructions? SUB r1, r2, r3 MUL r1, r2, (r3) DIV r1, r2, @(r4) Suppose every instruction is one word long, as well as every address. (A) 4 (B) 6 (C) 8 (D) 9 CO and Architecture addressing-modes co-and-architecture + – ankitgupta.1729 asked Dec 19, 2017 ankitgupta.1729 2.2k views answer comment Share Follow See all 8 Comments See all 8 8 Comments reply Show 5 previous comments akash.dinkar12 commented Jul 4, 2018 reply Follow Share welcome bhai:) 0 votes 0 votes Hirak commented Aug 3, 2019 reply Follow Share @akash.dinkar12 why are we considering two memory access for Indirect addressing mode? What I read about indirect addressing mode is that address of the operands are specified in the registers rather than in the instruction itself like Direct addressing mode. For example in indirect addressing mode we have instruction like LDAX B, i.e. load the accumulator with the contents of the memory location pointed by the BC pair. So how many memory access do we need here? I believe 1 as we are just going to the memory location pointed by BC pair and fetching the operand from there. So 1 memory access right? 0 votes 0 votes Hirak commented Aug 4, 2019 reply Follow Share @akash.dinkar12 In the second instruction, (r3) means this represents direct addressing mode, This statement is wrong as (r3) doesn't represent direct addressing but it represents register indirect addressing mode. and In the third instruction, @(r4) means this represents indirect addressing mode This statement is also wrong as @(r4) represents memory indirect addressing mode. Read http://www.cs.iit.edu/~virgil/cs470/Book/chapter4.pdf Pg(10-11) 0 votes 0 votes Please log in or register to add a comment.
3 votes 3 votes Total mem refrence = 6 abhishekmehta4u answered Jul 4, 2018 abhishekmehta4u comment Share Follow See all 0 reply Please log in or register to add a comment.