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How many memory accesses required by the following instructions?
SUB r1, r2, r3
MUL r1, r2, (r3)
DIV r1, r2, @(r4)

Suppose every instruction is one word long, as well as every address.

(A) 4

(B) 6

(C) 8

(D) 9
in CO and Architecture by Boss (15.4k points) | 331 views
+2
6 memory access

3 instruction fetch +1 for direct addressing +2 for indirect addressing
0
Got it..  Thanks!
0
@sachin

Please elaborate.
+6

Explanation will be in this way...

First of all, we have to fetch the instructions one by one, so for fetching, we will have to access main memory, for 3 instructions, 3 memory accesses will be there.

According to usual conventions, in the first instruction, there will be no other extra memory access because everything that is needed to execute the instruction is present in registers, we need not go to the Main memory.

In the second instruction, (r3) means this represents direct addressing mode, which means effective memory address will be directly available in a register, so we have to go to the main memory to access that one. So one memory access will be required...

In the third instruction, @(r4) means this represents indirect addressing mode which means the actual effective address is not directly present in the register, there will be some address, so we have to go to that particular address (1 memory access) and then on reaching that address, we will get some other address(actual effective address), so again we need to access it(2 memory access)..

So total memory access= 3 + 1 + 2 =6

 

 

0
@akash. Nice Explanation. Thank you :)
0
welcome bhai:)
0

@akash.dinkar12

why are we considering two memory access for Indirect addressing mode? What I read about indirect addressing mode is that address of the operands are specified in the registers rather than in the instruction itself like Direct addressing mode. For example in indirect addressing mode we have instruction like LDAX B, i.e. load the accumulator with the contents of the memory location pointed by the BC pair. So how many memory access do we need here? I believe 1 as we are just going to the memory location pointed by BC pair and fetching the operand from there. So 1 memory access right?

0

@akash.dinkar12

In the second instruction, (r3) means this represents direct addressing mode,

This statement is wrong as (r3) doesn't represent direct addressing but it represents register indirect addressing mode.

and

In the third instruction, @(r4) means this represents indirect addressing mode

This statement is also wrong as @(r4) represents memory indirect addressing mode.

Read http://www.cs.iit.edu/~virgil/cs470/Book/chapter4.pdf     Pg(10-11)

 

1 Answer

+2 votes

Total mem refrence = 6

 

by Boss (35.1k points)

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