3 votes 3 votes How many memory accesses required by the following instructions? SUB r1, r2, r3 MUL r1, r2, (r3) DIV r1, r2, @(r4) Suppose every instruction is one word long, as well as every address. (A) 4 (B) 6 (C) 8 (D) 9 CO and Architecture addressing-modes co-and-architecture + – ankitgupta.1729 asked Dec 19, 2017 ankitgupta.1729 2.1k views answer comment Share Follow See all 8 Comments See all 8 8 Comments reply sachin! commented Dec 19, 2017 reply Follow Share 6 memory access 3 instruction fetch +1 for direct addressing +2 for indirect addressing 2 votes 2 votes ankitgupta.1729 commented Dec 19, 2017 reply Follow Share Got it.. Thanks! 0 votes 0 votes smsubham commented Dec 29, 2017 reply Follow Share @sachin Please elaborate. 0 votes 0 votes akash.dinkar12 commented Jul 4, 2018 reply Follow Share Explanation will be in this way... First of all, we have to fetch the instructions one by one, so for fetching, we will have to access main memory, for 3 instructions, 3 memory accesses will be there. According to usual conventions, in the first instruction, there will be no other extra memory access because everything that is needed to execute the instruction is present in registers, we need not go to the Main memory. In the second instruction, (r3) means this represents direct addressing mode, which means effective memory address will be directly available in a register, so we have to go to the main memory to access that one. So one memory access will be required... In the third instruction, @(r4) means this represents indirect addressing mode which means the actual effective address is not directly present in the register, there will be some address, so we have to go to that particular address (1 memory access) and then on reaching that address, we will get some other address(actual effective address), so again we need to access it(2 memory access).. So total memory access= 3 + 1 + 2 =6 7 votes 7 votes ankitgupta.1729 commented Jul 4, 2018 reply Follow Share @akash. Nice Explanation. Thank you :) 0 votes 0 votes akash.dinkar12 commented Jul 4, 2018 reply Follow Share welcome bhai:) 0 votes 0 votes Hirak commented Aug 3, 2019 reply Follow Share @akash.dinkar12 why are we considering two memory access for Indirect addressing mode? What I read about indirect addressing mode is that address of the operands are specified in the registers rather than in the instruction itself like Direct addressing mode. For example in indirect addressing mode we have instruction like LDAX B, i.e. load the accumulator with the contents of the memory location pointed by the BC pair. So how many memory access do we need here? I believe 1 as we are just going to the memory location pointed by BC pair and fetching the operand from there. So 1 memory access right? 0 votes 0 votes Hirak commented Aug 4, 2019 reply Follow Share @akash.dinkar12 In the second instruction, (r3) means this represents direct addressing mode, This statement is wrong as (r3) doesn't represent direct addressing but it represents register indirect addressing mode. and In the third instruction, @(r4) means this represents indirect addressing mode This statement is also wrong as @(r4) represents memory indirect addressing mode. Read http://www.cs.iit.edu/~virgil/cs470/Book/chapter4.pdf Pg(10-11) 0 votes 0 votes Please log in or register to add a comment.
3 votes 3 votes Total mem refrence = 6 abhishekmehta4u answered Jul 4, 2018 abhishekmehta4u comment Share Follow See all 0 reply Please log in or register to add a comment.