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Question

Consider a two level cache system. For 100 memory references, 16 misses in the first level cache and 8 misses in the second level cache. Miss penalty from L2 cache to memory is 50 cycles. The hit time of L2 cache is 5 cycles and hit time of the L1 cache is 1 clock cycle. What is the average memory access time (in cycle)?

Answer given is 5.8

My attempt:

Miss penalty of L1 cache is nothing but hit time of L2 cache.

So miss penalty of L1 cache = 5 cycles..

Given miss penalty of L2 cache = 50 cycles

So total no of stalls per memory access = Miss rate of L1 x Miss penalty of L1

                                                                         + Miss rate of L1 x Miss rate of L2 x Miss penalty of L2

                                                                       = ((16/ 100) x 5) + ((16/ 100) (8 / 16) x 50)

                                                                       = (16/ 100) (26)=4.8

Comments

1+0.16(5+0.5(50))=1+4.8=5.8

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@Amit puri

why are you calculating total no of stalls per memory access ?

question is asking to calculate EMAT.

Answer 1

avg memory access time=h1*t1+(1-h1)(h2)(t1+t2)+(1-h1)(1-h2)(t1+t2+t3)

h1 is hit rate in l1 cache

t1 is time for l1 cache

h2 is hit rate in l2 cache

t2 is time for l2 cache

t3 is miss penalty(l2->memory)

h1=(100-16)/100=0.84

t1=1 clock cycle

16 misses in l1 cache so those 16 will be given to l2 cache in those 16 8 are misses so hits are 8 so hit rate is 50%=0.5 in l2

h2=0.5

t2=5

t3=50

substitute in the formula

(0.84)(1)+(0.16)(0.5)(1+5)+(0.16)(0.5)+(1+5+50)

=(0.84)+(0.48)+4.48

=5.8