ISRO2009-79

Question

Compared to CISC processors,RISC processors contain

• A. More register and smaller instruction set
• B. larger instruction set
• C. less registers and smaller instruction set
• D. more transistor elements

Answer 1

OPTION A MORE REGISTER AND SMALLER INSTRUCTION SET

Comments

cisc:-

it support more no. Of register

It support more no. Of addressing mode.

It suppor variable length instruction.

It support no one instruction cycle(CPI not equal to 1).

It support unsuccessful pipelining.

It support larger instructions set.

It is a general purpose computer.

It is used in general purpose application.

It is low expensive.

It is used microprogrammed control unit.

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RISC:-

1. It support less no. register.
2. It support less no. Of addressing mode.
3. It support fix length instruction.
4. It support one instruction per cycle.
5. It support successful pipelining.
6. It is small instructions set.
7. It is a super computer.
8. It is used in real time system.
9. It is high expensive.
10. It is used hardwired control unit.

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Option A is right.

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@mohit kumar RISC support more number of register while CISC support less number of registers as compared to RISC because CISC have more memory references

Answer 2

ans is (a)

CISC - larger, more feature-rich instruction set (more operations, addressing modes, etc.).  slower clock speeds.  fewer general purpose registers.  Examples: x86 variants

RISC - smaller, simpler instruction set.  faster clock speeds.  more general purpose registers.  Examples: MIPS, Itanium, PowerPC
 

Answer 3

RISC stands for Reduced Instruction Set Computer. It is the traditional load/store architecture in which operands have to be present in the registers in order to perform computations.

In contrast to RISC, CISC can access the operands directly from the memory to perform computations.

For this reason, RISC needs more registers than CISC. And of course, as the name suggests, it has a smaller instruction set. Hence, Option A

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Bonus:-

RISC	CISC
Fixed Instruction size	Variable Instruction size
Software-centric	Hardware-centric
Hardwired Control Unit	Microprogrammed Control Unit
Instruction Decoding is faster	Instruction Decoding is slower
Uses pipelining	Pipelining rarely used

Answer 4

A reduced instruction set computer, or RISC , is one whose instruction set architecture (ISA) allows it to have fewer cycles per instruction (CPI) than a complex instruction set computer (CISC).
In RISC architecture, the instruction set of the computer is simplified to reduce the execution time. It uses small and highly optimized set of instructions which are generally register to register operations