1,595 views
2 votes
2 votes
Consider 4-way set associative cache of a 64 KB organized into a 32 blocks. Main memory size is 4 GB. In the cache controller, each line in the set contain 1 valid, 1 modified and 2 replacement bits along with a tag. How much space is required in the cache controller to store the tag information (Meta data)

Please log in or register to answer this question.

Related questions

0 votes
0 votes
2 answers
3
Alakhator asked Oct 19, 2018
661 views
What is the number of multiplexers required in set associative mapping hardware ? Given set bits are S, tag bits are T and word bits are W.
1 votes
1 votes
0 answers
4
akankshadewangan24 asked Jan 18, 2018
552 views
If the main memory is of 128 K byte and the cache memory is of 16 byte line . It uses associative mapping . Then the tag bits for cache blocks are......... 11 bit 21b...