Virtual Gate Test Series - Digital Logic

Question

In a 4-bit carry look ahead adder, the propagation delay of EX-OR gate is 20ns, AND and OR gates is 10ns. The sum and carry output of full adder takes 20ns and 10ns respectively. The total propagation delay of the above adder in ns is ________

Ans: 60ns. Can someone explain me how?

Thanks in advance

Comments

for 4 bit 3 XOR gate, 3 AND gate, 2 OR gate required
max time will be taken by XOR gate
AND and OR gate work parallel with XOR gate
so, total tome by 3 XOR gate is 3*20=60ns

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Please provide the circuit diagram of your circuit.
What I thought: 4 bit adder means 4 full adders working in parallel (carry look ahead). Each full adder has one EXOR gate.
Before the full adder could actually start, the carry has to be generated.
Carry is generated using AND gates at level 1 and OR gate at level 2. Thus, 20ns will be the time taken to generate all the carry bits.
Then full adder (EXOR gate) will take 20ns. Thus, all the sum bits will be generated in 40ns in total.
Please correct me where ever I am wrong.

Answer 1

For 4 bit addition(A4A3A2A1 + B4B3B2B1), the final carry term C4 will be the one that will take most time

C4 = G4 + G3P4 + G2P3P4 + G1P2P3P4 + C0P1P2P3P4
(where, C0 is the initial carry;    Gi = AiBi;   Pi = Ai XOR Bi )

C0P1P2P3P4 is the biggest term
To produce it - the first level will have XORs for P terms
then we'll need a 3 level AND system(considering that all gates have a fan-in of '2' )
here, 1 XOR + 3 AND = 20 + 30 =50ns

Then finally this term is also in OR with other Sum-of-product terms
so 50 + 10 = 60ns
(We don't have to consider the OR levels for 2-fan-in ORs, as the rest of the terms will be ready before this big term)

Please correct me wherever I'm wrong