menu
search
Log In
Quick search syntax
tags tag:apple
author user:martin
title title:apple
content content:apple
exclude -tag:apple
force match +apple
views views:100
score score:10
answers answers:2
is accepted isaccepted:true
is closed isclosed:true

Subjects

Network Sites

 GO Mechanical
 GO Electrical
 GO Electronics
 GO Civil
 CSE Doubts

IES 2018- Stack Pointer

1 vote
70 views

Statement I  Stack works on the principle of LIFO
Statement II  :Stack pointer contains address of the top of the stack

(a) Both statemnts I and statement II are individually true and statement II is the correct explanation of statement I
(b) Both statement I and statement II are indivudially true but statement II is not the correct explanation of statement I
(c) Statements I is true but statement II is false
(d) Statement I is false but statement II is true

in Digital Logic 70 views

Please log in or register to answer this question.

← Prev. Next →
← Prev. Qn. in Sub. Next Qn. in Sub. →

Related questions

1 vote
0 answers
1
105 views
IES 2018- Stack memory
Statement I : Stack is organized as 8-bit storage in the microprocessor. Statement II : Stack is a set of memory locations in R/W memory reserved for storing information temporarily during the execution of a program. (a) Both statemnts I and statement II are ... statement I (c) Statements I is true but statement II is false (d) Statement I is false but statement II is true
Statement I : Stack is organized as 8-bit storage in the microprocessor. Statement II : Stack is a set of memory locations in R/W memory reserved for storing information temporarily during the execution of a program. (a) Both statemnts I and statement II are individually true ... of statement I (c) Statements I is true but statement II is false (d) Statement I is false but statement II is true
asked Jan 9, 2018 in CO and Architecture sh!va 105 views
1 vote
0 answers
2
133 views
IES 2018 - Memory PLA PROM
Statement I : PLA contains a fixed AND array and a programmable OR array. Statement II : PROM contains a fixed AND array and a programmable OR array. (a) Both statemnts I and statement II are individually true and statement II is the correct explanation of ... statement I (c) Statements I is true but statement II is false (d) Statement I is false but statement II is true
Statement I : PLA contains a fixed AND array and a programmable OR array. Statement II : PROM contains a fixed AND array and a programmable OR array. (a) Both statemnts I and statement II are individually true and statement II is the correct explanation of statement I ( ... of statement I (c) Statements I is true but statement II is false (d) Statement I is false but statement II is true
asked Jan 9, 2018 in Digital Logic sh!va 133 views
1 vote
0 answers
3
95 views
IES 2018 - Product of sum form
Product of sum form expression leads to what kind of logic circuit? (a) OR-AND circuit (b) NOR-NOR circuit (c) AND-OR-INVERT circuit (d) NAND-NAND circuit
Product of sum form expression leads to what kind of logic circuit? (a) OR-AND circuit (b) NOR-NOR circuit (c) AND-OR-INVERT circuit (d) NAND-NAND circuit
asked Jan 9, 2018 in Digital Logic sh!va 95 views
1 vote
1 answer
4
195 views
IES 2018 JK Flip flop
In a master slave JK flip-flop (a) both master and slave are positive edge triggered (b) both master and slave are negative edge triggered (c) master is positive edge triggered and slave is negative edge triggered (d) master is negative edge triggered and slave is positive edge triggered
In a master slave JK flip-flop (a) both master and slave are positive edge triggered (b) both master and slave are negative edge triggered (c) master is positive edge triggered and slave is negative edge triggered (d) master is negative edge triggered and slave is positive edge triggered
asked Jan 9, 2018 in Digital Logic sh!va 195 views
Dark theme
Muffin by Hélio Chun
Thanks to Q2A
...