3 votes 3 votes The speed up of a pipelined processor is $5.4,$ operating at $2$ GHZ frequency with efficiency $82\%$. What will be no. of stages available in this processor$?$ CO and Architecture co-and-architecture pipelining + – saxena0612 asked Jan 10, 2018 • edited Mar 14, 2019 by Naveen Kumar 3 saxena0612 795 views answer comment Share Follow See all 3 Comments See all 3 3 Comments reply joshi_nitish commented Jan 10, 2018 reply Follow Share speedup=efficiency * no. of stages no. of stages = 5.4/0.82 ~ 7 1 votes 1 votes saxena0612 commented Jan 10, 2018 reply Follow Share If stages are $7$ then efficiency will reduce to $77.14\%\ ?$ 1 votes 1 votes joshi_nitish commented Jan 10, 2018 reply Follow Share you can manage to get somewhat less efficiency than original, but can never get more efficiency than original. 0 votes 0 votes Please log in or register to add a comment.
0 votes 0 votes 7 ............ Blackcode00 answered Jun 25, 2020 Blackcode00 comment Share Follow See all 0 reply Please log in or register to add a comment.
0 votes 0 votes Efficiency = Speedup / Stages => Stages = 5.4 / 0.82 = 6.58 Take stages = 6, then efficiency = 90% and taking stages = 7, efficiency = 77.14% Hence, Stages = 6 is better here as efficiency >= 90% sachin486 answered Jul 24, 2020 sachin486 comment Share Follow See all 0 reply Please log in or register to add a comment.
