# TEST SERIES

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option Dseems correct gives output 1
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why option c is wrong?
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1 (O/P from 1st one ) +0(o/p from 2 one)  + 0 =   1           and end me bubble hai circuit pe toh complement of 1 = 0 hence o/p = zero  ,
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For option (c)

( (0 XOR 1) XOR (0 XOR 1)' XOR 0)'

= (1 XOR 0 XOR 0)'

=0

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Can you prove A is wrong.
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@Anu007   clearly output is zero  for option A

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why?
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For option (A)

( (1 XOR 1) XOR (1 XOR 1)' XOR 0)'

= (0 XOR 1 XOR 0)'

=0

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so  option (A) wrong

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Why this wrong.

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ExNor has property when even number of 0 then output is 1.

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Anu007  because last circuit is  EX-NOR complement of EX-OR , complement of 1 = 0

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i dont know about this property but ,  0+1+0 , so i first find   ex-or output = 1/2 = 0  , then  i took complement  , so it seems correct
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option D
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Hira can you prove that. M not getting proof.
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Anu

here we r considreing last gate like this...(a xor b xor c)'  not (a Xnor b Xnor c)

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Ex OR is not always compliment to Ex NOR each other. It's only true for n (variables ) are even no.

Even A EXOR B EXOR C = A EX NOR B EX NOR C ( it's not necessarily true for all odd no. Of variable)

I hope this will helps you @anu and @sumit
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@srivivek , sorry to say but D is not right.

Ex NOR and EXOR  follow the associativity property so

For D option

(1 Exnor 0) EXnor 1

= 0 EXnor 1

= 0
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@sumit goyal 1.

(A $\bigoplus$ B) = $\overline{( A \bigodot B)}$

(A $\bigoplus$ B $\bigoplus$ C ) = (A $\bigodot$ B $\bigodot$ C)

EX-OR gate is the odd number of 1's detector whereas EX-NOR gate is even number of 1's detector.

EX-OR gate gives output 1 if a number of 1's in the input is odd.

EX-NOR gate gives output 1 if a number of 1's in the input is even.

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## Related questions

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1 vote
Q. The minimum number of $2$-input $NAND$ gates required to implement the function $F = (x' + y')(z + w)$ is $?$ plz explain?? and also i realized but I am getting always correct answer plz suggest how to approach???
In a $4-$bit carry look ahead adder, the propagation delay of EX-OR gate is $20ns,$ AND and OR gates is $10ns.$ The sum and carry output of full adder takes $20ns$ and $10ns$ respectively. The total propagation delay of the above adder in $ns$ is