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If half adders and full adders are implements using gates, then for the addition of two 17 bit numbers (using minimum gates) the number of half adders and full adders required will be

  1. 0,17
  2. 16,1
  3. 1,16
  4. 8,8
in Digital Logic by Active (2.5k points) | 5.3k views
0
explain it in detail

 

 

plz
0

We have two 17 bit numbers, one adder is used for adding one bit so for the least significant bit we don't need any full adder as we always  have 0 as initial carry for the LSB so we can add LSB using half adder but for rest of the 16 bits from 2nd bit from right to MSB we need full adder because carry can be generated by them hence there is need of 16 full adder.

Hence option C) is correct

+1

5 Answers

+10 votes
Best answer
Option c ) 1 half adder 16 Full adder
by Boss (16.5k points)
–1

Please explain this answer

+7
take 17 bit 2 numbers for first 2 bit of each number we need one half adder and for rest(16 bit of each number) we will have one carry of previous sum and two bits of each number so we need one full adder for each rest of bits.
+1
here "first 2 bits" are LSB right?
0
yes
0
Why cant we achieve it using 0,17 ?
+1
yes you can.. but ur solution must be cost effective.. right?

with 1 HA instead of 1 FA, you can reduce number of gates.
+5 votes

Answer : Option C 

 

by Active (5.1k points)
0
great!
+4 votes
Ans (c)

1 H.A    and   (n-1) F.A
by (291 points)
0
is it a formula?
0
how??? is this any formula?!! pls explain
0
i think u should make diagram for clear understanding:)
0 votes
(c)1,16
by (11 points)
0 votes
Let the two 17 bit numbers be,

(a0 a1 a2 a3....a16)

(b0 b1 b2.........b16)

1 half adder will take input a16, b16 and return a sum and a carry. This carry will be forwarded to the next adder (full adder). The first full adder will take three inputs (the carry from previous stage, a15, b15) and generate the next sum and next carry for the second full adder. In this way, 16 full adders are used.

So, 1 H.A and 16 F.A (ans)
by Active (1.3k points)
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