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Consider a system using  a sengmented paging architecture. The segment is divided into 8k pages each of size 2k words . The segement table is divided into 256 k pages each of size 512 words. The page table entry size requires 64 bits . the frame number requires 22 bits then calculate logical address (LA)

a) 51 bits

b) 61 bits

c) 33 bits

d) 64 bits

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Segment Address : Segment No(S)+WordNo(D)

Since Segment is divided into 8K pages of 2K words each.It means Paging is done over D part of address . Now D Part will be broken into P|D' Format.

Where P is PAge No

D'- Word No

So D=P+D'=log(8K)+log(2k)=13+11=24

Now Segment table is also divided.It means Paging is done on S part Of Logical address.

S=Log(256K)+Log(512)=18+9=27

So Logical Address=S+D=27+24=51 Bits

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