Computer Organization

Question

Is it correct approach to solve this question.Please tell.

Qu.
time for memory access=100 ns, time for cache access =5ns
40 % of data access results in successfull cache hit.
70 % of instruction access result in succesfull TLB hit.
A program has 30 % data & 70 % instructions.
effective access time =.

Solution :
let program has 100 lines.
So data has 30 lines and instruction has 70 lines.
Data hit -> 30 * 0.4 =12 lines
Instruction hit -> 70 * 0.7 =49 lines
Total hit: 49+12=61 lines .so hit ratio= 61/100 =0.61
Effective access time= 0.61 * 5 +(1-0.61)*(5+100)
=3.05+40.95=44ns

Comments

i think before accessing the data first we need to use MMU for conversion of virtual address to physical address...therefor we will use TLB....

and also either data part of instruction part of program all must go through this procedure......

...?