38 votes 38 votes A $4$-way set-associative cache memory unit with a capacity of $16$ KB is built using a block size of $8$ words. The word length is $32$ bits. The size of the physical address space is $4$ GB. The number of bits for the TAG field is ____ CO and Architecture gatecse-2014-set2 co-and-architecture cache-memory numerical-answers normal + – go_editor asked Sep 28, 2014 edited Sep 11, 2018 by kenzou go_editor 25.8k views answer comment Share Follow See all 4 Comments See all 4 4 Comments reply JashanArora commented Jan 20, 2020 reply Follow Share Assume byte addressability (default) 20 7 5 Tag Set Offset $<----32---->$ Assume word addressability. (Cache = 4K words; word size = 4B; PAS = 1G words) 20 7 3 Tag Set Offset $<----30---->$ 13 votes 13 votes KineticKarm commented Nov 21, 2020 reply Follow Share Great in both case we obtain the same answer...but in every instance, Will we get the same answer for byte-addressable & word addressable memory? 2 votes 2 votes shashankrustagi commented Feb 8, 2021 reply Follow Share Yes, same!! 0 votes 0 votes Mohitdas commented Nov 12, 2021 reply Follow Share How do you take PAS = 1G words in word addressability? VAS is 4GB... 0 votes 0 votes Please log in or register to add a comment.
1 votes 1 votes ………………………………………………………………………….. Mohitdas answered Nov 12, 2021 Mohitdas comment Share Follow See all 0 reply Please log in or register to add a comment.