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​​The following assembly code is to be executed in a 3-stage pipelined processor with hazard detection and resolution in each stage. The stage are IF, OF (one or more as required) and execution (including writeback operation). What are the number of possible RAW, WAW and WAR hazards in the execution of the code.

I4-I5 IS ALSO RAW HAZARD WHY IT IS NOT COUNTED

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