computer organization

Question

Consider the following statements :
S₁ : Delayed control transfer involve starting the execution of the instruction after a branch or control instruction regardless of whether the branch is taken.
S₂ : A way to implement branch prediction is to store the result of a branch condition in a branch target buffer.
S₃ : If, a multi-cycle, pipelined processor has ‘N’ pipeline stages, then structural hazards can be avoided completely if at least ‘N’ registers are available.
Which of the above statements are true ?

Comments

why third one is not true

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S1: TRUE

S2: looks FALSE to me (can you please confirm?)

S3: FALSE.

Structural hazard is when more than one instruction requires the same hardware unit in the same clock cycle. Having more REGISTERS won't help here. If we had more instances of each hardware part, such as ALU, register files, etc. then I think it might be true.