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A sequential circuit takes an input stream of 0's and 1's and produces an output stream of 0's and 1's. Initially it replicates the input on its output until two consecutive 0's are encountered on the input. From then onward, it produces an output stream, which is the bit-wise complement of input stream until it encounters two consecutive 1's, whereupon the process repeats. An example input and output stream is shown below.

The input stream: 101100|01001011 0|11
The desired output 101100|10110100 0|11

J-K master-slave flip-flops are to be used to design the circuit.

Give the minimized sum-of-product expression for J and K inputs of one of its state flip-flops

asked in Digital Logic by Veteran (103k points) | 173 views

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We can design a Mealy Machine as per the requirement given in the question. 

From which we will get state table, and we can design sequential circuit using any Flip-flop from the state table (with the help of excitation table) :


As we get $4$ states (renaming state component to binary states), we need two FFs to implement it.

Let $A$ and $B$ be present states, $x$ be the input and $y$ be the output.

\text{Present State}&\text{Input}&\text{Next State}&\text{Output}&\rlap{\text{FF}\\\text{inputs}}&&\rlap{\text{FF}\\\text{inputs}}\\\hline
\end{array}$ \begin{array}{cc|cc} Q_t&Q_{t+1}&J&K\\\hline 0&0&0&X\\0&1&1&X\\1&0&X&1\\1&1&X&0\end{array}


answered by Veteran (55.3k points)
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In the question they mention " J-K master-slave flip-flops are to be used to design the circuit. "

But you did with Melay and Moore
@shaik .. it is state machine to sequential logic circuit
0 votes

first i read the question wrongly instead of J-K master-slave flip-flops i read as J-K Flipflop... after i solve the question i realize the point but for my satisfaction i uploaded this solution

answered by Boss (31.5k points)

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