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A sequential circuit takes an input stream of $0's$ and $1's$ and produces an output stream of $0's$ and $1's.$ Initially it replicates the input on its output until two consecutive $0's$ are encountered on the input. From then onward, it produces an output stream, which is the bit-wise complement of input stream until it encounters two consecutive 1's, whereupon the process repeats. An example input and output stream is shown below.

$\begin{array}{ll}
\text{The input stream:} &  101100|01001011|011\\
\text{The desired output:}&  101100|10110100|011\\
\end{array}$

$\text{J-K}$ master-slave flip-flops are to be used to design the circuit.

  1. Give the state transition diagram
  2. Give the minimized sum-of-product expression for $\text{J}$ and $\text{K}$ inputs of one of its state flip-flops
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34 votes
34 votes

We can design a Mealy Machine as per the requirement given in the question. 

From which we will get state table, and we can design sequential circuit using any Flip-flop from the state table (with the help of excitation table) :

As we get $4$ states (renaming state component to binary states), we need two FFs to implement it.

Let $A$ and $B$ be present states, $x$ be the input and $y$ be the output.$$\small \begin{array}{c|c|c|c|cc|cc|}
\text{Present State}&\text{Input}&\text{Next State}&\text{Output}&\rlap{\text{FF}}&&\rlap{\text{FF}}\\
&&&&\rlap{\text{inputs}}&&\rlap{\text{inputs}}\\
\hline
AB&X&A'B'&Y&J_A&K_A&J_B&K_B\\\hline
00&0&01&0&0&X&1&X\\
00&1&00&1&0&X&0&X\\
01&0&10&0&1&X&X&1\\
01&1&00&1&0&X&X&1\\
10&0&10&1&X&0&0&X\\
10&1&11&0&X&0&1&X\\
11&0&10&1&X&0&X&1\\
11&1&00&0&X&1&X&1\\
\end{array}$$ \begin{array}{cc|cc} Q_t&Q_{t+1}&J&K\\\hline 0&0&0&X\\0&1&1&X\\1&0&X&1\\1&1&X&0\end{array}

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32 votes
32 votes

As we get $4$ states (renaming state component to binary states), we need two FFs to implement it.

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