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consider a system using 2 level paging applicable page table is divided into 2K pages each of size 4 KB. if pas is 64 MB which is divided into 16K frames memory is byte addressable . page tabke entry size is 2 bytes in both the levels calculate the length of 

logical and physical address.

total number of entry at second level 

3 Answers

3 votes
3 votes

As Page size is given 4KB(12 Bits)

Lets say No of pages in LAS is 2X. So LAS bits=X+12

Now No of second level Page table entries=( 2X) *2/212  which will be equal to 2K as given.

( 2X) *2/212 =2K

So X=22

So LAS bits= 22+12=34

PAS bits=14+12=26 
No of Page table enries in second Level=2K

0 votes
0 votes
PAS=64MB =2^26 B
so PS=26bit
Page Size=2^12 B so Page offset=12 bit
so the PS is divided as 14|12
This step does not require any paging info
-------------------------------------------------------------

inner most PT size =Number of pages * Size of each page =2^11 * 2*12 = 2^23 B
PTE size =2B
so No of PTE = 2^23/2=2^22 = Number of pages in the process
So the Virtual adress is divided as 22|12
Now outer page table size =2^23 B and page size = 2^12 B so inner page table cant fit in one page
hence paging of inner page table is required , so the number of pages possible of the inner page table each of 4K size is 2^23/2^12 =2^11 pages = number of entries for the outer page table
PTE size = 2B
so outer page table size= 2^11*2 = 2^12 B

So outer page table size is 2^12B and page size is 2^12 B so now the page table can fit in one page  of the main memory . Hence no longer paging of outer page table is required
So answer is : 14|12
                        22|12
                        2^11 entries or 2K entries
Hope this helps!
0 votes
0 votes

A 2-level paging scheme is used.

It is already given in the question that the applicable page table is divided into 2K pages

=> 1st level page table do not fit in a single frame. Because if it fits into one frame then we will not get 2k pages of size 4KB.

=> in 2nd  level page table, #entries = #pages created for 1st level page table = 2K, and so the answer.

 

Physical address calculation:

Given page table is divided into pages of size 4K and we know in case of paging, page-size and frame-size is same throughout.

So offset is 12-bit. 

Also 16k frames are there => 14bit required to access each frame uniquely.

PA: 14|12

 

Logical Address Calculation:

Offset is 12 bit(calculated above).

2nd level page has 2k entries => 12 bit

1st level page we need to calculate.  Given 1st level has 2K pages each of size 4KB => 1st level Page table size is 2K*4KB = 2000 * 4KB

Also page table entry is 2 bytes => #entries in 1st level page table = 2000 * 4KB / 2B = 4M(approx) => 22 bit required

So logical address: 12|22|12

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