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Suppose that in $500$ memory references there are $50$ misses in the first level cache and $20$ misses in the second level cache. Assume miss penalty from the $L2$ cache to memory in $100$ cycles. The hit time of $L2$ cache is $20$ cycles. The hit time of the $L1$ cache is $10$ cycles. If there are $2.5$ memory references per instruction, how many average stall cycles per instructions.

  1. $10$
  2. $5$
  3. $15$
  4. $\text{None of these}$
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Average Number of stalls per instruction = (# misses per instruction in L1   × Hit time in L2) + (# misses per instruction in L2 × Miss penalty of L2)
2.5 memory references per instruction ⇒ 500/2.5 instructions for 500 references = 200 instructions
∴ Average number of stalls per instruction
=(50/200)×20+(20/200)×100
= 5 + 10 = 15 cycles.

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